FX802 DVSR Codec
The FX802 DVSR Codec contains:
A Continuously Variable Slope Delta Modulation (CVSD) encoder and decoder.
Control and timing circuitry for up to 4Mbits of external Dynamic Random Access Memory (DRAM).
“C-BUS” µProcessor interface and control logic. When used with external DRAM, the FX802 has four primary functions:
- Speech Storage
- Speech Playback
- Data Storage
Digital data sent over the “C-BUS” from the system µController may be stored in DRAM.
- Data Retrieval
- Answering Machine applications, where an incoming speech message is stored for later recall.
- Busy Buffering, an outgoing speech message is stored temporarily until the transmit channel becomes free.
- Automatic transmission of pre-recorded ‘Alarm’ or status announcements.
- Time Domain Scrambling of speech messages.
- VOX control of transmitter functions.
- Temporary Data Storage applications, such as buffering of over-air data transmissions.
On-chip, the Delta Codec is supported by input and output analogue switched-capacitor filters and audio output switching circuitry. The DRAM control and timing circuitry provide all the necessary address, control and refresh signals to interface to external DRAM. The FX802 DVSR Codec is a low-power 5-volt CMOS LSI device. This unit is the ceramic one.