SP8600A 250MHz Counter

Divide by Four 250 MHz Counter

SP8600 250 MHz Counter PLESSEY


The SP8600 is an asynchronous ECL, divide by four, counter with open collector outputs. It requires external input bias and an AC coupled input signal of 600mV p-p.
Intended for use with an external bias arrangement and capacitive coupling to the signal source, the SP8600 can be either single driven, or double driven with two complementary input signals. 
The outputs are complementary free collectors that can have their load resistors taken to any bias voltage up to 12V more positive than VEE.


  • Open Collector Output
  • AC Coupled Input
  • Temperature Range: -55°C to +125°C (A Grade)

Quick Reference Data

  • Supply Voltage: -5.2V
  • Power Consumption: 85mW
  • Input Frequency: 250MHz

Operating Notes

  1. The input is usually AC-coupled to one of the inputs or, if complementary signals are available, to both inputs.
  2. If no signal is present the device will self-oscillate. If this is undesirable, this can be prevented by offsetting the two inputs by approximately 40mV.
  3. The outputs are in the form of complementary free collectors with about 2mA available from them over full temperature range. The outputs can be interfaced to ECL or Schottky TTL.
  4. For maximum frequency operation, the output load resistor values must be such that the output transistors will not saturate. If the output load resistors are connected to 0V, then saturation occurs with resistor values greater than 600 ohms; if only one output is used the other output can be connected to 0V.
  5. The input can be operated down to DC, but input slew rate must be better than 20V/µs.
  6. The input impedance varies as a function of frequency.
These samples are A Grade, working temperature from -55°C to +125°C, metal can and golden pins.