SP8601A

Divide by Four 150 MHz Counter

SP8601A PLESSEY

Features

  • Current steered output can drive TTL or CMOS
  • AC or DC Coupled Input
  • Inputs ECL II Compatible

Quick Reference Data

  • Supply Voltage: -5.2V
  • Power Consumption: 85mW
  • Input Frequency: 150MHz

Description

The SP8601 is an asynchronous ECL counter with a current steered output which can be used to drive TTL or CMOS. Biased externally, it may be directly driven from an ECL II source.

Operating Notes

  1. The signal source can be capacitively coupled to the clock input if input bias is provided (See Fig. 6) but is normally directly coupled with ECL II levels. The inputs can be operated either singly or with double complementary input drive.
  2. The outputs are in the form of complementary free collectors with 1.6mA available from them over full military temperature range (A grade). The outputs can be interfaced to ECL or Schottky. Interfacing to TTL at frequencies above 20 MHz requires low capacitance interconnections and the use of Schottky TTL logic.
  3. For maximum frequency operation the output load resistor values must be such that the output transistors will not saturate. If the output load resistors are connected to 0V then saturation will occur with resistor values greater than 600 ohms. If only one output is used the other output can be connected to 0V.
  4. Input impedance is a function of frequency.
  5. The input can be operated down to DC but input slew rate must be better than 20V/µs.
  6. All components should be suitable for the frequency in use.
This sample is A Grade, working temperature from -55°C to +125°C, metal can and golden pins.