SP8614 800MHz Counter

800MHz Divide-by-Four Counter

SP8614 800MHz Counter PLESSEY

The SP8614 is an asynchronous divide by four counter with ECL compatible outputs which can also be used to drive 100Ω lines. Input sensitivity is 600mV p-p.

Operating Notes

  • The clock input (pin 4) should be capacitively coupled to the signal source. The input signal path is completed by connecting a capacitor from the internal bias decoupling, pin 6, to ground.
  • If no signal is present the device will self-oscillate. If this is undesirable it may be prevented by connecting a 10kΩ resistor from the input to Vee (Pin 4 to Pin 7). This reduces sensitivity by approximately 100mV.
  • The input can be operated at very low frequencies but slew rate must be better than 200V/µs.
  • The input impedance of the SP8614 is a function of frequency.
  • The emitter follower outputs require external load resistors. These should not be less than 330Ω, and a value of 430Ω is recommended.

This device may be used with split supply lines and ground referenced input.

White ceramic case and golden pins.